A delta connected multilevel converter, e.g. a static synchronous compensator (STATCOM) comprises, for each phase leg, an alternating current (AC) side and a direct current (DC) side. The DC bus voltage of the DC side for any phase leg is the sum of the cell capacitor voltages on that particular phase leg. This DC bus voltage is a fictive bus which does not appear structurally in the converter. The STATCOM contains three legs, each leg between two phases. When measuring the fictive DC bus voltage of the leg between the phases A and B, then all the cell capacitor voltages in that particular leg are added together and that is called the DC bus voltage of the phase leg AB. Similarly, in case of a Y (called wye or star) connected STATCOM, the DC bus voltage is between phase (A, B or C) and neutral (called N or earth). The AC harmonic generation by a multilevel converter depends on the number of cells and switching frequency per cell. For cell switching frequencies above three times the fundamental frequency (which may be e.g. 50 or 60 Hz), the lower order voltage harmonics (typically 3rd, 5th, 7th, 9th and 11th) generated by the converter phase leg is insignificant for multilevel converters with a large number of cells, e.g. above 20, according to the Pulse-width modulation (PWM) theory. This holds true when the cell voltages are fixed (i.e. converter is in no-load). However, when the converter is loaded, even harmonics appear on the DC side of the cell voltages which can be seen through power balance between the AC and DC sides. These even harmonic voltages on the DC side interact with the fundamental modulating reference voltage to generate stray magnitudes (up to 2%) of lower order voltage harmonics on the AC side of the converter. Also, in addition to this, when a lesser pulse number per cell (less than 3.5) is used, then the triangle comparison based modulation scheme will generate lower order harmonics irrespective of the number of cells used (i.e., could be more than 20 cells). This phenomenon could be referred to as lower order voltage harmonics generated due to the modulation scheme.
Though the current controller can correct these low order harmonics, the extent of correction is limited by the bandwidth of the current controller. Hence, there would be specific filter requirements for these harmonics to bring the voltage distortion under customer requirements which in turn would increase the cost of the overall system.
In phase shifted carrier (PSC) based PWM, cell capacitor voltages are balanced by adding or subtracting an in-phase component of the current with the voltage reference. A conventional voltage based sorting algorithm can also be used for balancing of cell capacitor voltages. The converter with PSC based PWM generates lower order harmonics, e.g. 3rd and 5th order harmonics. Fast Fourier transform (FFT) is performed on the voltage measured across the valves of the converter phase leg excluding the drop across the arm reactor. As mentioned above, it has also been observed that the magnitude of the lower order harmonics is further increased with the reduction of pulse number.
The lower order harmonics generated on the AC side of the converter may be due to the following reasons:    (i) Ripple in the cell capacitor voltages due to the instantaneous power flowing through the cell capacitors.    (ii) Improper volt-second balance due to non-idealities, e.g. variation of reference voltage within the time period of carrier signal (i.e., due to low pulse numbers) and variation of cell capacitor voltages.
The second point becomes more prominent when the converter is subjected to operate at low pulse number, e.g. around a pulse number of 3 or less.
U.S. Pat. No. 8,766,570 discloses a control method for a converter. Switching sequences are calculated either through model predictive direct torque control (MPDTC) or offline calculated optimized pulse patters (OPP) to optimize a certain control function such as switching loss, reduced total harmonic distortion (THD), etc. These switching patterns are calculated for steady state operation. When the switching function is applied in real time, due to the non-linearity in the system and due to transient operation of the converter, the actual flux generated by the converter deviates from the desired flux. Hence a prediction model is used to predict the flux error in the switching horizon, when using the switching sequence. At least one transition time of the switching sequence is changed in an attempt to minimize the predicted flux error. The flux error minimization control method is performed on a three-phase level and its target is to reduce the current THD.